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Sheet目录3828

41页 42页 43页 44页 [45页]46页 47页 48页 49页

2010 Microchip Technology Inc.

DS70135G-page 139

dsPIC30F4011/4012

20.0

10-BIT, HIGH-SPEED ANALOG-

TO-DIGITAL CONVERTER

(ADC) MODULE

The 10-bit, high-speed Analog-to-Digital Converter

(ADC) allows conversion of an analog input signal to a

10-bit digital number. This module is based on a

Successive Approximation Register (SAR) architecture

and provides a maximum sampling rate of 1 Msps. The

ADC module has 16 analog inputs which are multi-

plexed into four sample and hold amplifiers. The output

of the sample and hold is the input into the converter

which generates the result. The analog reference

voltages are software selectable to either the device

supply voltage (AVDD/AVSS) or the voltage level on the

(VREF+/VREF-) pins. The ADC module has a unique

feature of being able to operate while the device is in

Sleep mode.

The ADC module has six 16-bit registers:

A/D Control Register 1 (ADCON1)

A/D Control Register 2 (ADCON2)

A/D Control Register 3 (ADCON3)

A/D Input Select Register (ADCHS)

A/D Port Configuration Register (ADPCFG)

A/D Input Scan Selection Register (ADCSSL)

The ADCON1, ADCON2 and ADCON3 registers

control the operation of the ADC module. The ADCHS

ADPCFG register configures the port pins as analog

inputs or as digital I/O. The ADCSSL register selects

inputs for scanning.

The block diagram of the ADC module is shown in

Figure 20-1.

Note:

This data sheet summarizes features of

this group of dsPIC30F devices and is not

intended to be a complete reference

source. For more information on the CPU,

peripherals,

descriptions

and

general device functionality, refer to the

dsPIC30F

Family

Reference

Manual

(DS70046). For more information on the

device instruction set and programming,

refer to the “16-bit MCU and DSC

Reference Manual” (DS70157).

Note:

The

SSRC<2:0>,

ASAM,

SIMSAM,

SMPI<3:0>, BUFM and ALTS bits, as well

as the ADCON3 and ADCSSL registers,

must not be written to while ADON = 1.

This would lead to indeterminate results.

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